Lattice PAR Report File Radiant Software (64-bit) 2025.1.0.39.0 Mon Feb 9 14:22:19 2026 Command Line: par -w -n 1 -t 1 -s 1 -cores 1 -hsp m LED_impl_1_map.udb \ LED_impl_1.udb Cost Table Summary Level/ Number Estimated Timing Estimated Worst Timing Run Run Cost [udb] Unrouted Worst Slack Score Slack(hold) Score(hold) Time Status ---------- -------- ----------- ------ --------------- ----------- ---- ------ 5_1 * 0 - - - - 01:22 Completed * : Design saved. Total (real) run time for 1-seed: 1 mins 29 secs par done! Best Par Run PAR: Place And Route Radiant Software (64-bit) 2025.1.0.39.0. PARed on: Mon Feb 9 14:22:19 2026 Command Line: par -w -t 1 -cores 1 -hsp m LED_impl_1_map.udb \ LED_impl_1_par.dir/5_1.udb Loading LED_impl_1_map.udb ... Loading device for application GENERIC from file 'ap6a400ce.nph' in environment: C:/lscc/radiant/2025.1/ispfpga. Package Status: Preliminary Version 7. Performance Hardware Data Status: Preliminary Version 105.1. Design: led Family: LAV-AT Device: LAV-AT-E70 Package: LFG1156 Performance Grade: 3 Constraint Summary Total number of constraints: 35 Total number of constraints dropped: 0 Number of Signals: 92 Number of Connections: 229 + Pin Constraint Summary: 18 out of 18 pins locked (100% locked). INFO: assign sig65(osc_clk_c[0]) to regional clock due to driver being locked at an RCLK only IO 'N7'. Starting Placer Phase 0. CPU time: 36 secs , REAL time: 36 secs Finished Placer Phase 0. CPU time: 36 secs , REAL time: 36 secs Starting Placer Phase 1. CPU time: 36 secs , REAL time: 36 secs Finished Placer Phase 1. CPU time: 36 secs , REAL time: 36 secs Placer score = 1344. Starting Placer Phase 2. CPU time: 36 secs , REAL time: 36 secs Finished Placer Phase 2. CPU time: 36 secs , REAL time: 36 secs Placer score = 1330 Device utilization summary: WRIO 7/95 7% used 7/95 7% bonded HPIO 11/468 2% used 11/459 2% bonded SLICE 25/198720 <1% used LUT 50/397440 <1% used REG 28/397440 <1% used Clock Report Global Clock Resources: CLK_PIN : 0 out of 22 (0%) PLL : 0 out of 11 (0%) DCS : 0 out of 4 (0%) DCC : 0 out of 344 (0%) ECLKDIV : 0 out of 45 (0%) OSC : 0 out of 1 (0%) Global Clocks: PRIMARY : 0 out of 24 (0%) Regional Clocks: RCLK "osc_clk_c[0]" from comp "osc_clk" on RCLK PIN site "N7 (WRIO1_3B)", clk load = 18, ce load = 0, sr load = 0 REGIONAL : 1 is used. Edge Clocks: No edge clock selected. I/O Usage Summary (final): 7 out of 95 (7.4%) WRIO sites used. 7 out of 95 (7.4%) bonded WRIO sites used. Number of WRIO components: 7; differential: 0 Number of Vref pins used: 0 11 out of 468 (2.4%) HPIO sites used. 11 out of 459 (2.4%) bonded HPIO sites used. Number of HPIO components: 11; differential: 0 I/O Bank Usage Summary: +----------+----------------+------------+------------+ | I/O Bank | Usage | Bank Vccio | Bank Vref1 | +----------+----------------+------------+------------+ | 0 | 0 / 16 ( 0%) | 3.3V | - | | 1 | 7 / 15 ( 46%) | 3.3V | - | | 2 | 0 / 12 ( 0%) | 3.3V | - | | 3 | 0 / 51 ( 0%) | 1.8V | - | | 4 | 0 / 51 ( 0%) | 1.8V | - | | 5 | 0 / 51 ( 0%) | 1.8V | - | | 6 | 11 / 51 ( 21%) | 1.8V | - | | 7 | 0 / 51 ( 0%) | 1.8V | - | | 8 | 0 / 51 ( 0%) | 1.8V | - | | 9 | 0 / 51 ( 0%) | 1.1V | - | | 10 | 0 / 51 ( 0%) | 1.1V | - | | 11 | 0 / 51 ( 0%) | 1.1V | - | | 12 | 0 / 16 ( 0%) | 3.3V | - | | 13 | 0 / 16 ( 0%) | 3.3V | - | | 14 | 0 / 20 ( 0%) | 3.3V | - | +----------+----------------+------------+------------+ Total Placer CPU time: 37 secs , REAL time: 37 secs Checksum -- place: 6598b4e9b47834588e4ec80cb353fcb878bb24c5 Writing design to file LED_impl_1_par.dir/5_1.udb ... ----------------------------------------------------------------- INFO - par: ASE feature is off due to non timing-driven settings. ----------------------------------------------------------------- Start NBR router at 14:23:04 02/09/26 ***************************************************************** Info: NBR allows conflicts(one node used by more than one signal) in the earlier iterations. In each iteration, it tries to solve the conflicts while keeping the critical connections routed as short as possible. The routing process is said to be completed when no conflicts exist and all connections are routed. Note: NBR uses a different method to calculate timing slacks. The worst slack and total negative slack may not be the same as that in timing report. You should always run the timing tool to verify your design. ***************************************************************** Starting routing resource preassignment Preassignment Summary: -------------------------------------------------------------------------------- 28 connections routed with dedicated routing resources 59 connections routed (of 209 total) (28.23%) --------------------------------------------------------- Clock routing summary: Regional clocks: Signal "osc_clk_c[0]" Clock loads: 18 out of 18 routed (100.00%) -------------------------------------------------------------------------------- Completed routing resource preassignment Start NBR section for initial routing at 14:23:36 02/09/26 Level 4, iteration 1 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ Routing in Serial Mode ...... +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 1(0.00%) conflict; 0(0.00%) untouched conn; 0 (nbr) score; real time: 33 secs Info: Initial congestion level at 75.00% usage is 0 Info: Initial congestion area at 75.00% usage is 0 (0.00%) Start NBR section for normal routing at 14:23:38 02/09/26 Level 4, iteration 1 0(0.00%) conflict; 0(0.00%) untouched conn; 0 (nbr) score; real time: 34 secs Start NBR section for post-routing at 14:23:38 02/09/26 End NBR router with 0 unrouted connection(s) Checksum -- route: d37606cc18281bb71dd4e6b6cc68279fd987e9e Total CPU time 34 secs Total REAL time: 35 secs Completely routed. End of route. 209 routed (100.00%); 0 unrouted. Writing design to file LED_impl_1_par.dir/5_1.udb ... All signals are completely routed. PAR_SUMMARY::Run status = Completed PAR_SUMMARY::Number of unrouted conns = 0 PAR_SUMMARY::Estimated worst slack<setup/<ns>> = <n/a> PAR_SUMMARY::Timing score<setup/<ns>> = <n/a> PAR_SUMMARY::Estimated worst slack<hold/<ns>> = <n/a> PAR_SUMMARY::Timing score<hold/<ns>> = <n/a> PAR_SUMMARY::Number of errors = 0 Note: user must run 'timing' for timing closure signoff. Total CPU Time: 1 mins 28 secs Total REAL Time: 1 mins 29 secs Peak Memory Usage: 8469.14 MB par done! Copyright (c) 1991-1994 by NeoCAD Inc. All rights reserved. Copyright (c) 1995 AT&T Corp. All rights reserved. Copyright (c) 1995-2001 Lucent Technologies Inc. All rights reserved. Copyright (c) 2001 Agere Systems All rights reserved. Copyright (c) 2002-2025 Lattice Semiconductor Corporation, All rights reserved.